FreeEMS  0.2.0-SNAPSHOT-282-g9efc524
interrupts.c
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1 /* FreeEMS - the open source engine management system
2  *
3  * Copyright 2008-2013 Fred Cooke
4  *
5  * This file is part of the FreeEMS project.
6  *
7  * FreeEMS software is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 3 of the License, or
10  * (at your option) any later version.
11  *
12  * FreeEMS software is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with any FreeEMS software. If not, see http://www.gnu.org/licenses/
19  *
20  * We ask that if you make any changes to this file you email them upstream to
21  * us at admin(at)diyefi(dot)org or, even better, fork the code on github.com!
22  *
23  * Thank you for choosing FreeEMS to run your engine!
24  */
25 
26 
27 /** @file
28  *
29  * @ingroup interruptHandlers
30  *
31  * @brief Interrupt Vector Table
32  *
33  * This file contains the definition of the interrupt vector table. This
34  * table consists only of pointers to void(void) functions that will be
35  * called by the hardware when an interrupt of a certain type occurs.
36  */
37 
38 
39 #include "inc/freeEMS.h"
40 #include "inc/interrupts.h"
41 
42 
43 /* Correctly placed in memory due to compiler/linker directives in memory.x and the linker script. */
44 /* This is the FULL table of length 0xFF starting at 0xFF00 and ending at 0xFFFF, redirected with */
45 /* jumps to the offset location by the serial monitor starting at 0xF700 and ending at 0xF800 */
46 /* http://m68hc11.serveftp.org/wiki/index.php/FAQ:Interrupts */
47 
48 const interruptTable _vectors[] VECTORS = {
49 /* 0xFF00 to 0xFF0F */
50 /* The first row are NOT actually interrupts at all, just a wasted 16 bytes for tidiness */
51 /* UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, */
52 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
53 /* */
54 
55 /* 0xFF10 to 0xFF1F */
56  SpuriousISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
57 /* Spurious Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
58 /* */
59 
60 /* 0xFF20 to 0xFF2F */
61  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
62 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
63 /* */
64 
65 /* 0xFF30 to 0xFF3F */
66  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
67 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
68 /* */
69 
70 /* 0xFF40 to 0xFF4F */
71  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
72 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
73 /* */
74 
75 /* 0xFF50 to 0xFF5F */
76  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
77 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */
78 /* */
79 
80 /* 0xFF60 to 0xFF6F */
81  RAMViolationISR,XGATEErrorISR, UISR, UISR, UISR, UISR, UISR, UISR,
82 /* RAM violation XGATEsoft error XGATE 7 XGATE 6 XGATE 5 XGATE 4 XGATE 3 XGATE 2 */
83 /* */
84 
85 /* 0xFF70 to 0xFF7F */
86  UISR, UISR, UISR, UISR, UISR, UISR ,UISR, UISR,//VRegAPIISR,
87 /* XGATE 1 XGATE 0 PIT 3 PIT 2 PIT 1 PIT 0 Reserved API */
88 /* */
89 
90 /* 0xFF80 to 0xFF8F */
91  LowVoltageISR, UISR, UISR, UISR, UISR, UISR, UISR, PortPISR,
92 /* Low Voltage IIC1 SCI5 SCI4 SCI3 SCI2 PWM ESDown Port P */
93 /* */
94 
95 /* 0xFF90 to 0xFF9F */
96  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
97 /* CAN4 Tx CAN4 Rx CAN4 Errors CAN4 Wakeup CAN3 Tx CAN3 Rx CAN3 Errors CAN3 Wakeup */
98 /* */
99 
100 /* 0xFFA0 to 0xFFAF */
101  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
102 /* CAN2 Tx CAN2 Rx CAN2 Errors CAN2 Wakeup CAN1 Tx CAN1 Rx CAN1 Errors CAN1 Wakeup */
103 /* */
104 
105 /* 0xFFB0 to 0xFFBF */
106  UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR,
107 /* CAN0 Tx CAN0 Rx CAN0 Errors CAN0 Wakeup FLASH EEPROM SPI2 SPI1 */
108 /* */
109 
110 /* 0xFFC0 to 0xFFCF */
111  UISR, UISR, SelfClockISR, PLLLockISR, UISR, UISR, PortHISR, PortJISR,
112 /* IIC0 Reserved CRG self clock CRG PLL lock PAB Overflow ModDwnCtrUF Port H Port J */
113 /* */
114 
115 /* 0xFFD0 to 0xFFDF */
116  UISR, UISR, UISR, SCI0ISR, UISR, UISR, UISR, TimerOverflow,
117 /* ATD1 ATD0 SCI1 SCI0 SPI0 PAIE PAA OF ECT OF */
118 /* Serial 0 */
119 
120 /* 0xFFE0 to 0xFFEF */
121  Injector6ISR, Injector5ISR, Injector4ISR, Injector3ISR, Injector2ISR, Injector1ISR, SecondaryRPMISR,PrimaryRPMISR,
122 /* ECT7 ECT6 ECT5 ECT4 ECT3 ECT2 ECT1 ECT0 */
123 /* RTOutput 6 RTOutput 5 RTOutput 4 RTOutput 3 RTOutput 2 RTOutput 1 Secondary RPM Primary RPM */
124 
125 /* 0xFFF0 to 0xFFFF */
126  RTIISR, IRQISR, XIRQISR, UISR, UnimplOpcodeISR,_start, _start, _start
127 /* RTI IRQ XIRQ SWI UnimpInstruct COP Reset ClockReset SystemReset */
128 /* Entry point */
129 };
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