FreeEMS  0.2.0-SNAPSHOT-282-g9efc524
interrupts.h
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1 /* FreeEMS - the open source engine management system
2  *
3  * Copyright 2008-2013 Fred Cooke
4  *
5  * This file is part of the FreeEMS project.
6  *
7  * FreeEMS software is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 3 of the License, or
10  * (at your option) any later version.
11  *
12  * FreeEMS software is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with any FreeEMS software. If not, see http://www.gnu.org/licenses/
19  *
20  * We ask that if you make any changes to this file you email them upstream to
21  * us at admin(at)diyefi(dot)org or, even better, fork the code on github.com!
22  *
23  * Thank you for choosing FreeEMS to run your engine!
24  */
25 
26 
27 /** @file
28  *
29  * @ingroup allHeaders
30  * @ingroup globalHeaders
31  *
32  * @brief All interrupt handler declarations
33  *
34  * All of the declarations for ISR functions are done here because they are all
35  * used in one place and it doesn't make sense to spread them out over N files
36  * for N functions. ISR headers only exist where there is a requirement for
37  * local variables and constants etc.
38  */
39 
40 
41 /* Header file multiple inclusion protection courtesy eclipse Header Template */
42 /* and http://gcc.gnu.org/onlinedocs/gcc-3.1.1/cpp/ C pre processor manual */
43 #ifndef FILE_INTERRUPTS_H_SEEN
44 #define FILE_INTERRUPTS_H_SEEN
45 
46 
47 /* http://www.gnu.org/software/m68hc11/m68hc11_gcc.html Section 1.4.1 */
48 /* http://gcc.gnu.org/onlinedocs/gcc-4.0.0/gcc/Function-Attributes.html */
49 /* http://gcc.gnu.org/onlinedocs/gcc-4.0.0/gcc/Variable-Attributes.html */
50 
51 /* Interrupt attribute shortcut */
52 #define INT __attribute__((interrupt))
53 
54 /* Start and stop atomic operations (Things that we don't want interrupted half way through) */
55 /* For certain operations we will need to prevent the process from being interrupted, operations such as */
56 /* writing all vars to a block ready for reading and logging etc. The link below is for avrs, but goes */
57 /* into some detail about clearing and setting interrupts during important operations. */
58 /* http://hubbard.engr.scu.edu/embedded/avr/doc/avr-libc/avr-libc-user-manual/group__avr__interrupts.html */
59 #define ATOMIC_START() __asm__ __volatile__ ("sei") /* set global interrupt mask */
60 #define ATOMIC_END() __asm__ __volatile__ ("cli") /* clear global interrupt mask */
61 
62 /* Interrupt vector memory management */
63 #define VECTORS __attribute__ ((section (".vectors")))
64 extern void _start(void);
65 
66 /* Interrupt sub-routine prototypes - assigned to text1 region in linear space */
67 void UISR(void) INT TEXT1; /* Unimplemented Interrupt Sub Routine */
68 
69 /** This ISR is expanded from @ref InjectorXISR via include
70  * statement, and macro definitions, so are the othe 5 below.
71  *
72  * @see injectorISR.c
73  * @see injectionISRs.c
74  */
75 void Injector1ISR(void) INT TEXT1;
76 void Injector2ISR(void) INT TEXT1; ///< @copydoc Injector1ISR
77 void Injector3ISR(void) INT TEXT1; ///< @copydoc Injector1ISR
78 void Injector4ISR(void) INT TEXT1; ///< @copydoc Injector1ISR
79 void Injector5ISR(void) INT TEXT1; ///< @copydoc Injector1ISR
80 void Injector6ISR(void) INT TEXT1; ///< @copydoc Injector1ISR
81 
82 /** RPM ISRs, IC timer for engine position and RPM.
83  *
84  * There are multiple copies of this interrupt handler, each is linked with the
85  * rest of the code once such that if there are N decoder implementations and/or
86  * variants, then there are N loadable binaries produced after a full build.
87  *
88  * For details on any specific decoder implementation, see the documentation for
89  * that specific file.
90  */
91 void PrimaryRPMISR(void) INT TEXT1;
92 void SecondaryRPMISR(void) INT TEXT1; ///< @copydoc PrimaryRPMISR
93 
94 void TimerOverflow(void) INT TEXT1; /* IC/OC timer overflow handling */
95 void ModDownCtrISR(void) INT TEXT1; /* Modulus Down Counter */
96 
97 void IgnitionDwellISR(void) INT TEXT1; /* PIT timer 0 for dwell start */
98 void IgnitionFireISR(void) INT TEXT1; /* PIT timer 1 for coil firing */
99 void StagedOnISR(void) INT TEXT1; /* PIT timer 2 for switching staged injectors on */
100 void StagedOffISR(void) INT TEXT1; /* PIT timer 3 for switching staged injectors off */
101 
102 void PortPISR(void) INT TEXT1; /* Port P interrupt service routine */
103 void PortHISR(void) INT TEXT1; /* Port P interrupt service routine */
104 void PortJISR(void) INT TEXT1; /* Port P interrupt service routine */
105 
106 void IRQISR(void) INT TEXT1; /* IRQ/PE1 interrupt service routine */
107 void XIRQISR(void) INT TEXT1; /* XIRQ/PE0 interrupt service routine */
108 
109 void RTIISR(void) INT TEXT1; /* Real Time interrupt service routine */
110 
111 void SCI0ISR(void) INT TEXT1; /* Serial 0 interrupt service routine */
112 
113 void LowVoltageISR(void) INT TEXT1; /* Low voltage counter ISR */
114 void VRegAPIISR(void) INT TEXT1; /* VReg periodic interrupt ISR */
115 void PLLLockISR(void) INT TEXT1; /* PLL lock lost/gained ISR */
116 void SelfClockISR(void) INT TEXT1; /* Self Clock mode entered/exited ISR */
117 
118 void SpuriousISR(void) INT TEXT1; /* Spurious Interrupt ISR */
119 void UnimplOpcodeISR(void) INT TEXT1; /* Unimplemented Opcode ISR */
120 void RAMViolationISR(void) INT TEXT1; /* CPU RAM Access Violation ISR */
121 void XGATEErrorISR(void) INT TEXT1; /* XGATE Software Error ISR */
122 
123 
124 typedef void (* interruptTable)(void);
125 
126 
127 #else
128  /* let us know if we are being untidy with headers */
129  #warning "Header file INTERRUPTS_H seen before, sort it out!"
130 /* end of the wrapper ifdef from the very top */
131 #endif