FreeEMS  0.2.0-SNAPSHOT-282-g9efc524
xgate.inc
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1 /* FreeEMS - the open source engine management system
2  *
3  * Copyright 2009-2010 Fred Cooke
4  *
5  * This file is part of the FreeEMS project.
6  *
7  * FreeEMS software is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 3 of the License, or
10  * (at your option) any later version.
11  *
12  * FreeEMS software is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with any FreeEMS software. If not, see http://www.gnu.org/licenses/
19  *
20  * We ask that if you make any changes to this file you email them upstream to
21  * us at admin(at)diyefi(dot)org or, even better, fork the code on github.com!
22  *
23  * Thank you for choosing FreeEMS to run your engine!
24  */
25 
26 /* @author Sean Keys */
27 
28 /* Flag Masks */
29 .equ SW_ISR_ZERO_CFLAG_MASK, 0x0100
30 .equ PIT0_CFLAG_MASK, 0x0001
31 .equ PIT1_CFLAG_MASK, 0x0002
32 .equ PIT2_CFLAG_MASK, 0x0003
33 
34 /* Registers */
35 .equ SW_ISR_FLAG_REG, 0x0398
36 .equ PITTF, 0x0345 /* PIT Time-Out Flag Register, low 4 bits set when each counter reaches 0 */
37 .equ PITINTE, 0x0344 /* PIT Interrupt Enable Register, low four bits control the ISRs */
38 .equ PITCE, 0x0342 /* PIT Channel Enable Register, low 4 bits let the channel count */
39 .equ PITFLT, 0x0341 /* PIT Force Load Timer Register, low 4 bits force load timers */
40 .equ PORTP, 0x0258 /* PORT-P register */
41 .equ PORTBA, 0x0000 /* PORT-BA register */
42 .equ PORTB, 0x0001 /* PORT-B register */
43 
44 /* General Defines */
45 .equ ZERO_OFFSET, 0x0000
46 
47 /* Bit Masks */
48 .equ PORTBA_PROTECTION_MASK, 0x0FFF ; only use the first 12 pins on PORTBA
49 
50